AMD, Broadcom, Cisco, Google, HPE, Intel, Meta, and Microsoft have joined forces to develop Ultra Accelerator Link (UALink), a new industry standard to enable high-speed, low-latency interconnection for datacenter grade AI and HPC accelerators. UALink will allow for interconnecting up to 1,024 ...

Ultra Accelerator Link is an open-standard interconnect for AI accelerators being developed by AMD, Broadcom, Intel, Google, Microsoft, others | Tom's Hardware

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Over the course of decades, Broadcom (AVGO -1.54%) developed innovative products in the semiconductor and computing industry, including the world&#x27;s first small infrared transceiver, which allowed wireless data exchange for computers, phones, printers, and more.

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Broadcom manufactures many of the components you&#x27;ll find in wireless connectivity tech like Wi-Fi routers and wireless modems. It also makes fiber-optic connectivity equipment and Ethernet networking solutions, as well as software that gets the most out of this hardware.

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Apple, Nvidia, Microsoft, Broadcom, Best Buy: AI-driven PC, device upgrade wins

The rumours appear to have originated from a week-old anonymous Substack post claiming Broadcom had made a $38 billion offer for Zscaler.

Zscaler CEO Denies Broadcom Acquisition Rumours

Get the most recent info and news about Broadcom on HackerNoon, where 10k+ technologists publish stories for 4M+ monthly readers.

Broadcom Inc. designs, develops, and supplies a range of semiconductor devices with a focus on complex digital and mixed signal complementary metal oxide semiconductor based devices and analog III-V based products worldwide. The company operates through three segments: Semiconductor Solutions, Infrastructure Software, and Intellectual Property licensing. It provides set-top box system-on-chips (SoCs); cable, digital subscriber line, and passive optical networking central office/consumer premise equipment SoCs; Wireless local area network access point SoCs; Ethernet switching and routing application specific standard products; embedded processors and controllers; serializer/deserializer application specific integrated circuits; optical and copper, and physical layers; and fiber optic laser and receiver components. The company also offers RF front end modules, filters, and power amplifiers; Wi-Fi, Bluetooth, and global positioning system/global navigation satellite system SoCs; custom touch controllers; serial attached small computer system interface, and redundant array of independent disks controllers and adapters; peripheral component interconnect express switches; fiber channel host bus adapters; read channel based SoCs; custom flash controllers; preamplifiers; and optocouplers, industrial fiber optics, motion control encoders and subsystems, and light emitting diodes. In addition, it provides mainframe and enterprise software solution and cybersecurity solutions. Its products are used in various applications, including enterprise and data center networking, home connectivity, set-top boxes, broadband access, telecommunication equipment, smartphones and base stations, data center servers and storage systems, factory automation, power generation and alternative energy systems, and electronic displays. The company has a collaboration agreement with Liqid Inc. Broadcom Inc. was incorporated in 2018 and is headquartered in San Jose, California.

Broadcom

Most consumer radio products (think 802.11b/g/n, a.k.a WiFi, Bluetooth, Zigbee, Thread...) nowadays somehow make use of the ISM band around 2.4GHz. This band was chosen by multiple technologies for a series of reasons, the prominent one being that it's unlicensed. Its success, however, brought with it a key problem as well: overcrowding and interference. While most of us have experienced inter-device interference (ever scanned for WiFi and got back a list of 666 networks in range?), a more subtle form is what you could call intra-device interference, i.e. that experienced by devices that host more than one radio. The typical example in consumer electronics would be devices that support both WiFi and Bluetooth, but more esoteric combinations exist. The problem is simple to understand: let's say you have a WiFi radio with its antenna and a Bluetooth radio right next to it with its own antenna. They don't know about each other, so there is a high chance that they might transmit at the same time (the higher their combined duty cycle, the higher the chance). If they do, and if they happen to be transmitting close in the frequency domain, their transmissions will interfere with each other. Mitigation strategies Interference is usually solved by multiplexing over whichever domain possible. Physical separation Physical domain multiplexing would be a fancy expression for "keeping the antennas far from each other", which is one of the best practices in designing these systems. However, this approach is usually limited by the size of the product you're designing. If the PCB is a few centimeters long, that's as far as you can place antennas. Frequency separation Frequency domain multiplexing can potentially help a lot more. A good example of this is channel management in 802.11b/g/n: the 2.4GHz spectrum is divided in up to 14 channels (or as few as 11 in certain countries) each with a bandwidth of 22 MHz and a channel separation of 5 MHz, and WiFi access points select the channel that looks the least busy. Bluetooth uses a more dynamic approach called frequency hopping, in which the spectrum is split into a high number of channels and the radios jump from one to another following a pseudo-random pattern. This makes it less likely that a single, strong source of interference can disrupt a connection; however, a "uniformly" noisy 2.4GHz environment, or a very  close source with strong harmonics, will still be an issue. 802.15.4 (the standard on which Zigbee and Thread are based) uses 16 channels, (unintuitively) numbered from 11 to 26, with a bandwidth of 2 MHz and a channel separation of 5 MHz. Channel management is similar to WiFi, with the whole network being on the same channel and no frequency hopping. Channel changes are allowed, but a policy on when and how to do that is not standardised. Packet Traffic Arbitration as a solution PTA (Packet Traffic Arbitration) tries to help with time domain multiplexing. What that means is that one of the radios can act as a master, the other as a slave, and the master will decide (arbitrate) access to the air medium to avoid that the radios transmit (or, to a degree, expect to receive) something at the same time. PTA is described in IEEE 802.15.2 (2003) Clause 6. However, PTA is a recommendation, not a standard, so implementations vary in the details. The most common form of it uses 3 signals, usually called REQUEST, PRIORITY and GRANT. The slave can assert REQUEST to signal that it needs to access the air medium. Optionally, it can assert PRIORITY to influence the master's arbitration in its own favour. The master is responsible of asserting GRANT in response when it sees fit. This is where implementations diverge in the details of how this decision is taken. Some keep GRANT asserted whenever they are not transmitting, even if REQUEST is not asserted. Others will GRANT immediately on REQUEST if the medium is free, otherwise complete their transmission and then GRANT. However the GRANT happens, once it is asserted the slave will transmit and de-assert REQUEST when the medium is no longer required. This is also implementation dependent, as some slaves will de-assert immediately after transmitting while others, expecting an immediate reply, will wait some time before releasing the medium. There are also 4 wire (using an extra FREQ signal), 2 wire (omitting PRIORITY) and 1 wire (using just GRANT) variations, which are however less common. In any case, the master role is usually assigned to the WiFi radio in the system, as WiFi is usually the technology with the highest duty cycle among the ones involved. Getting practical with the CYW43143 and EFR32 For a series of reasons, PTA has not been used much recently. The most frequent use case (certainly the one that shifts the biggest amount of ICs) would be Bluetooth + WiFi in laptops and mobile phones, which is better served by so called combo chips. These integrate 2.4GHz WiFi, Bluetooth and 5GHz WiFi in one package, eliminating the need for PTA traces between 2 chips while also saving on BoM cost and PCB surface, which are both at a premium on mass marketed, portable devices. However, at , in a recent design we needed to do PTA at all costs. The system had the CYW43143 WiFi 2.4GHz radio (originally by Broadcom, then acquired by Cypress, in turn acquired by Infineon). The other 2.4GHz technology involved was Thread, a mesh network stack based on 802.15.4 (same as Zigbee) and IPv6. This of course ruled out a wifi-bluetooth combo chip. Our radio choice was a Silicon Labs EFR32. Elimo Engineering The board was based on an Allwinner A13 SoC running a heavily customised build of OpenWrt.The board already followed best practices to separate the antennas and frequency separation does not help much (Thread is less frequency-agile than WiFi, in which Access Points can move channel at any point in time); as a result, interference did occur frequently and PTA came to the rescue. Kind of. Enabling PTA The EFR32 played nice; Silicon Labs provides several libraries (called plugins) with its Thread stack, and one of them is a PTA library, which can be configured to use up to 3 wires, with different polarities, different request logics etc. The only significant limitation is that it only implements slave logic, but that was not a problem in our case (the 43143 only implements a master, so they fit perfectly). After a bit of configuration and a rebuild, the EFR32 was using REQUEST and PRIORITY as expected, as verified with a logic analyser (via the trusty !). sigrok First trouble As you can see from the GRANT line trace above, though, something was wrong on the other side. Despite running a ping at 1Hz on the Thread network, the (active low) GRANT line being stuck low meant that the 43143 was essentially not doing any arbitration and always giving the go ahead. This was the result of ignorance and (wrongly) assuming that the functionality would be enabled either by the driver that we used, or by the firmware that is loaded to the 43143 when the module is loaded. Here begins the trouble. brcmfmac brcmfmac The Cypress application note about coexistence ( ) covers both the proprietary, Cypress-only SECI interface (which can only be used between Cypress chips) and the "standard" PTA interface, and for the latter it mentions that certain NVRAM parameters need to be set. AN214852 USB - SDIO disagreements So far so good, except that setting NVRAM parameters is not as straightforward as you might hope. A look at the kernel module code shows that for SDIO chips, the module will load a firmware blob from and an file with NVRAM parameters. Easy peasy. brcmfmac /lib/firmware/brcm nvram.txt In our system, however, we use a USB interface to the 43143, and unfortunately the approach the module takes for USB chips is different: only a firmware blob is loaded, no trace of an nvram file. So, PTA requires custom NVRAM, the IC is USB and the USB code does not use an NVRAM file: kind of a nasty roadblock, since I (again, wrongly) thought that modifying the blob was a no-go. brcmfmac Compare the code from (note argument 1 is 0 and argument 3 is NULL, meaning nvram file is not loaded) ... brcmfmac/usb.c ret = brcmf_fw_get_firmwares(dev, , brcmf_usb_get_fwname(devinfo), , brcmf_usb_probe_phase2); (ret) {
brcmf_err( , ret); fail;
} /* request firmware here */ 0 NULL if "firmware request failed: %d\n" goto ... to the one from (note argument 1 is BRCMF_FW_REQUEST_NVRAM, argument 4 is not null): brcmfmac/sdio.c ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM, sdiodev->fw_name, sdiodev->nvram_name, brcmf_sdio_firmware_callback); OpenWrt to the rescue Thanks to the help of a couple of folks (PaulFertser and rmilecki) from the IRC channel on freenode, however, I had a couple of lucky breaks. #openwrt-devel First, the blob that is loaded for USB devices is a fairly standard TRX binary format. $ ./otrx check brcmfmac43143.bin
Found a valid TRX version Second, the blob contains the nvram parameters as zero terminated ASCII strings, and they are all just appended at the end. $ strings brcmfmac43143.bin

[SNIP]

extpagain2g=0
pdetrange2g=0
triso2g=3
antswctl2g=0
maxp2ga0=82
mcsbw202gpo=0x75333333
mcsbw402gpo=0x97544444
legofdmbw202gpo=0x75310000
cckbw202gpo=0x1111
swctrlmap_2g=0x0a050a05,0x0a050a05,0x00000000,0x00000000,0x000
xtalfreq=20000
otpimagesize=154
tempthresh=120
temps_period=5
temp_hysteresis=5
rssismf2g=0x8
rssismc2g=0x8
rssisav2g=0x2
loopbw2g=100
txalpfpu=1
aci_detect_en_2g=1
rxgaintempcoeff2g=60
$ Together with , a TRX format editor/checker written by rmilecki, this allowed me to use an hex editor to alter the blob and add the parameters from AN214852. otrx Easy, right? Nah. Deciphering the scripture Unfortunately, there is no documentation about said parameters outside of AN214852 and, even there, you are only given an example for a "4343W board" without explaining how to adapt them to other boards/ICs or what they do specifically. Of course the example parameters for the 4343W did not work on the 43143, so some guesswork was needed. As you can see in the logic trace above, using the values in the AN, the GRANT line was being toggled once in a while, and it was no longer stuck low. A sign that PTA was enabled, but something more was wrong. In fact, you can also see that the GRANT line was only sporadically toggling. Time to dig into the meaning of coexistence parameters from the AN: boardflags= zbcxpadnum= zbcxfnsel= zbcxgcigpio= 0x1 0x040201 0x233 0x123 and a few lines below, this slightly confusing addition: Boardflags= Boardflags2= 0x00000001 /* SECI coex */ 0x00000080 /* Board support legacy 3/4 wire */ This is accompanied by the following parameter bit maps: So, the general idea was that and would enable coexistence, and they should be set to and to do so. boardflags boardflags2 0x01 0x80 was reasonably simple: a the bitmap makes it obviously about which GPIO is used by which signal. On our board, GRANT is on GPIO1, PRIORITY on GPIO2 and REQUEST on GPIO4, so this needed to be changed to . zbcxpadnum 0x010204 is kind of a mystery still: the AN only mentions GCI, which seems to stand for Global Coexistence Interface, but says nothing more about it. From a quick Google search it seems GCI is a serial protocol, so this is probably not related to us. However, not defining this parameter seemed to go back to GRANT being always low. For lack of better understanding, I set it to the example value of . zbcxgcigpio 0x123 The key problem however was hiding behind , which controls, it seems, the muxing of different functions to different pins. The example of is not correct for the 43143, on which the PTA functions seem to be on position 3 for all GPIOs, probably giving us a value of for . This is a guess, since as you can see in the screenshot below, the 43143 datasheet does not specify the value. However, the "Legacy BT coexistence" function is always listed in 3rd place, so I decided to give it a go. zbcxfnsel 0x233 0x333 zbcxfnsel Taking it for a spin Let's add the parameters we decided above to the binary (see the last two lines): Now, TRX has a CRC, so these changes make the CRC wrong; luckily, prints out both the expected and the computed CRC: otrx $ ./otrx check brcmfmac43143.bin
Invalid data crc32: 0x4dc00fe3 instead of 0x2a665d76 Let's fix the CRC (taking into account the binary endianness, we need to reverse the CRC bytes) Now, let's place this new binary in and do a cold reboot (because will skip downloading the firmware if one is running already) to let the kernel module load the new binary. /lib/firmware/brcm/ brcmfmac A test with running on the wifi interface while pinging a host on the Thread network shows the following: iperf3 As hoped, the 43143 is now a PTA master and the EFR32 correctly honours the GRANT signal.

Reverse Engineering Broadcom Chips To Enable Packet Traffic Arbitration for 2.4GHz Co-Existence

We all know corporate life can be uncertain; smaller fish are swallowed by larger fish from time to time, and that is just the nature of Capitalism. However, it does not diminish the painful consequences mergers and acquisitions tend to leave behind on employees. That is, in fact, the nature of the beast. Greedy giant corporations couldn’t care less about the impact their ambition has on the lives of many of their employees, and in Broadcom’s case, the disfavorable impact on smaller customers as well. Speaking of Carbon Black’s customers, many knew of Broadcom’s reputation, and saw the writing on the wall, as such, they decided to part ways as soon as they heard of the possibility of Broadcom taking over VMWare Carbon Black. Possibly, to ease their concerns, announced  a couple of months ago his intent to divest Carbon Black. Management was thrilled and “Carbon Black” was “back”. Shortly thereafter, CB found out that Hock had not to sell (or was it all intentional from the start?). Symantec would absorb Carbon Black, and layoffs ensued. The bloodbath resembled the famous Red Wedding scene from Game of Thrones. Hock Tan claimed decided My Advice to Employees This sucks; it sucks big time, but all changes can lead to new opportunities, besides… ask yourself, would you want to work for a company that is devoid of a soul, has zero scruples, and questionable ethics, but mostly, does not care about the well-being of their acquired employees? Particularly when they have poured their life into the product and while Hock Tan himself has made on the deal? millions Do yourself a favor, and seek out companies that do value your hard work, allow for a work-life balance, and don’t see you as a mere expenditure. What Does This Mean for You, as a Current Carbon Black Customer? Although the CB support had already been affected by Broadcom’s hire freeze, as Broadcom continues to reduce headcount and employees realize their future is dim, Broadcom may potentially dismantle Carbon Black and absorb their intellectual property. Even if Carbon Black as a company survives, all we have to do is look back at Broadcom’s approach and realize they will focus on the large, premium tier accounts and direct their smaller customers to partners. It’s been rumored Hock Tan stated, referring to smaller accounts: “ ” Why would I give a shit about your account when all you give me is $25 a year? Hok’s religion is the almightly dollar, anything and everything is measured in profits. This is what to expect: The security efficacy of the product will continue to decline. Carbon Black won’t be able to prevent new threats as their teams are extremely shorthanded. Support will also be affected, resolution will be slow, and as their more experienced engineers leave the company (voluntarily or otherwise), the quality of support will continue to be adversely impacted. For Tier 1/Platinum level customers spending $250,000 or more, Broadcom may eventually force them to switch over to Symantec, despite the fact Symantec is a dinosaur in the grand scheme of cybersecurity products. If you care about the security posture of your enterprise or organization, public or private, I would consider other options. In closing, former Carbon Black employees, do not despair; even a massive corporation as huge as Broadcom can’t crush your spirit.

Carbon Red, Bloodshed Red

Organizations worldwide have expressed concern about the long term viability of the NetBackup platform, after its acquisition by Cohesity in 2024. These organizations wonder whether they will be able to access older NetBackup backups without paying hefty fees or maintaining a NetBackup license – especially in light of what happened with Broadcom’s acquisition of VMware. S2|DATA's latest free tool, Libertas, removes the concerns, marking a decisive movement in data accessibility. Breaking Free from Backup Software Prison For decades, companies remained locked into maintaining expensive backup infrastructure just to access their own historical data. S2|DATA's CEO, Brendan Sullivan, puts it bluntly, "For too long, costly backup infrastructure has locked organizations into maintaining it just to access their own data." The release of Libertas directly challenges this status quo, offering organizations a way to catalog and restore NetBackup disk images without requiring the original backup software. This Windows desktop application performs two crucial functions: cataloging backup contents into searchable CSV files and restoring files directly to any chosen directory. Users can even restore their drive backups to deduplication systems, with files automatically organized into searchable directories.  For customers that need to restore NetBackup backups on tape, or other backup formats like CommVault, NetWorker, or TSM, S2|DATA has a more advanced tool called TRACS that empowers their various professional services. The Hidden Cost of Legacy Data On a larger scale, traditional backup mechanisms often become a financial burden, requiring companies to maintain outdated systems and licenses purely to access historical information that may not even be relevant in the first place. When organizations update their infrastructure, they frequently discover vital data trapped in obsolete formats or devices, making the recovery process incredibly time-consuming and expensive. S2|DATA's solution stems from over 30 years of experience in non-native backup restoration. S2|DATA has developed their TRACS software capable of reading more than 100 physical tape formats and 35 enterprise backup formats, completely altering how organizations handle legacy data. Beyond Basic Backup Recovery While Libertas currently supports only NetBackup disk image formats, S2|DATA hints at future expansion to other major backup formats based on customer demand and needs. The tool represents just one component of S2|DATA's comprehensive suite of services, which includes digital forensics, e-discovery, and advanced data restoration capabilities. W. Curtis Preston, known in the industry as "Mr. Backup," has spoken at length on the tool's significance: "No one should be at the mercy of a backup software provider who will not allow data to be restored without paying them for the privilege." The release of Libertas is just another step in the long race for how organizations can manage their legacy data. As a software platform, it offers a glimpse into a future where accessing historical backups no longer requires maintaining expensive, outdated systems. This free tool represents a silent declaration of data independence for businesses worldwide. Organizations worldwide have expressed concern about the long term viability of the NetBackup platform, after its acquisition by Cohesity in 2024. These organizations wonder whether they will be able to access older NetBackup backups without paying hefty fees or maintaining a NetBackup license – especially in light of what happened with Broadcom’s acquisition of VMware. S2|DATA 's latest free tool, Libertas, removes the concerns, marking a decisive movement in data accessibility. S2|DATA S2|DATA Breaking Free from Backup Software Prison Breaking Free from Backup Software Prison For decades, companies remained locked into maintaining expensive backup infrastructure just to access their own historical data. S2|DATA's CEO, Brendan Sullivan, puts it bluntly, " For too long, costly backup infrastructure has locked organizations into maintaining it just to access their own data. " For too long, costly backup infrastructure has locked organizations into maintaining it just to access their own data. The release of Libertas directly challenges this status quo, offering organizations a way to catalog and restore NetBackup disk images without requiring the original backup software. Libertas Libertas This Windows desktop application performs two crucial functions: cataloging backup contents into searchable CSV files and restoring files directly to any chosen directory. Users can even restore their drive backups to deduplication systems, with files automatically organized into searchable directories.  For customers that need to restore NetBackup backups on tape, or other backup formats like CommVault, NetWorker, or TSM, S2|DATA has a more advanced tool called TRACS that empowers their various professional services. The Hidden Cost of Legacy Data The Hidden Cost of Legacy Data On a larger scale, traditional backup mechanisms often become a financial burden, requiring companies to maintain outdated systems and licenses purely to access historical information that may not even be relevant in the first place. When organizations update their infrastructure, they frequently discover vital data trapped in obsolete formats or devices, making the recovery process incredibly time-consuming and expensive. S2|DATA's solution stems from over 30 years of experience in non-native backup restoration. S2|DATA has developed their TRACS software capable of reading more than 100 physical tape formats and 35 enterprise backup formats, completely altering how organizations handle legacy data. Beyond Basic Backup Recovery Beyond Basic Backup Recovery While Libertas currently supports only NetBackup disk image formats, S2|DATA hints at future expansion to other major backup formats based on customer demand and needs. The tool represents just one component of S2|DATA's comprehensive suite of services, which includes digital forensics, e-discovery, and advanced data restoration capabilities. W. Curtis Preston, known in the industry as "Mr. Backup," has spoken at length on the tool's significance: " No one should be at the mercy of a backup software provider who will not allow data to be restored without paying them for the privilege. " No one should be at the mercy of a backup software provider who will not allow data to be restored without paying them for the privilege. The release of Libertas is just another step in the long race for how organizations can manage their legacy data. As a software platform, it offers a glimpse into a future where accessing historical backups no longer requires maintaining expensive, outdated systems. This free tool represents a silent declaration of data independence for businesses worldwide.

How S2|DATA's Libertas Tool Simplifies Restoration of Legacy NetBackup Data

S2|DATA-nın Libertas Aləti köhnə NetBackup məlumatlarının bərpasını necə asanlaşdırır

Πώς το εργαλείο S2|DATA Libertas απλοποιεί την αποκατάσταση των δεδομένων NetBackup παλαιού τύπου

Cómo la herramienta Libertas de S2|DATA simplifica la restauración de datos antiguos de NetBackup

Como a ferramenta Libertas de S2|DATA simplifica a restauración dos datos legados de NetBackup

Come lo strumento Libertas di S2|DATA semplifica il ripristino dei dati NetBackup legacy

S2|DATA の Libertas ツールがレガシー NetBackup データの復元を簡素化する方法

Ndenge nini Esaleli ya Libertas ya S2|DATA esilisaka bozongisi ya ba données ya NetBackup ya kala

Cara Alat Libertas S2|DATA Memudahkan Pemulihan Data NetBackup Legasi

Imayna S2|DATA kaqpa Libertas yanapakuynin Legacy NetBackup Willayta kutichiyta pisiyachin

Jinsi S2|DATA's Libertas Tool Inavyorahisisha Marejesho ya Urithi wa Data ya NetBackup

Paano Pinapasimple ng Libertas Tool ng S2|DATA ang Pagpapanumbalik ng Legacy NetBackup Data

Як інструмент S2|DATA Libertas спрощує відновлення застарілих даних NetBackup

Your Internet Traffic Is Slower Than It Should Be—Laconic Fixes That

Authors:
(1) Tianyi Cui, University of Washington (cuity@cs.washington.edu);
(2) Chenxingyu Zhao, University of Washington (cxyzhao@cs.washington.edu);
(3) Wei Zhang, Microsoft (wei.zhang.gbs@gmail.com);
(4) Kaiyuan Zhang, University of Washington (kaiyuanz@cs.washington.edu). Editor's note: This is Part 2 of 6 of a study detailing attempts to optimize layer-7 load balancing. Read the rest below. Table of Links Abstract and 1 Introduction
2 Background and 2.1 Programmable Multi-core SmartNICs

2.2 Load balancers


3 SmartNIC-based Load Balancers and 3.1 Offloading to SmartNICs: Challenges and Opportunities

3.2 Laconic Overview
3.3 Lightweight Network Stack
3.4 Lightweight synchronization for shared data
3.5 Acceleration with Hardware Engine


4 Evaluation and 4.1 Experiment Setup


4.2 End-to-end Throughput


4.3 End-to-end Latency


4.4 Evaluating the Benefits of Key Techniques


4.5 Real-world Workload



5 Related Work
6 Conclusion and References

A Appendix 2 Background This section discusses the structure, connectivity, and performance of programmable multi-core SmartNICs that are commonly available. We also describe the load-balancing functionality we want to deploy on these SmartNICs. 2.1 Programmable Multi-core SmartNICs We consider programmable SmartNICs equipped with multicore processors. A typical SmartNIC has onboard memory, DMA engines, and accelerators (e.g., engines for crypto, compression, and packet rewriting) in addition to the multi-core processor. Below, we discuss the two dominant categories, on-path and off-path SmartNICs [35]. On-Path SmartNICs: These are SmartNICs where the NIC processing cores are on the data path between the network port and the host processor (see Figure 1). Consequently, every packet received or transmitted by the host is also processed by the NIC cores. The performance of the NIC cores is critical to the throughput and latency characteristics of the NIC. To address this issue, these NICs typically augment the traditionally wimpy cores on the SmartNIC with specialized hardware support that enhances the packet-processing capabilities of the core. For example, packet contents are prefetched and placed in a structure similar to the L1 cache, and there are hardware mechanisms for managing packet buffers. The SmartNIC has hardware mechanisms for delivering incoming packets to NIC cores in a balanced manner, but there are no mechanisms, such as receive side scaling (RSS), to deliver specific packets to specific NIC cores. Further, the NIC cores can invoke specialized accelerators for tasks such as crypto and compression. Marvell LiquidIO [37] and Netronome NICs [40] are on-path SmartNICs. Off-Path SmartNICs: These are SmartNICs where the NIC’s processing cores are off the data path connecting the host to the network. A NIC-level switching fabric, a NIC switch, provides connectivity between the network port, the host cores, and the NIC cores. The NIC switch is a specialized hardware unit with match-action engines for selecting packet fields and rewriting them based on runtime-configurable rules. The rules route packets received from the network to the host or the NIC, or rewrite them and immediately transmit them back into the network. Mellanox Bluefield [41] and Broadcom Stingray [10] are off-path SmartNICs. The off-path SmartNICs thus contain both general-purpose cores and packet match-action engines. The packet-processing logic could thus be split across the cores and the match-action engines based on the complexity of the logic. For instance, the cores can perform complex packet processing and delegate to the match-action engines simpler operations such as packet steering, header-rewriting, and packet forwarding. Offloading to SmartNICs: Datacenter operators are increasingly resorting to offloading various infrastructure functions to SmartNICs and reducing the usage of host cores, which can, in turn, then be rented out and monetized. The ARM cores on SmartNICs are not as powerful as the host x86 cores, but they are an order of magnitude less expensive and result in substantial cost savings [3, 6]. Network virtualization, security, and storage are some of the typical operations offloaded to SmartNICs, and in this work, we seek to expand this to include the infrastructure’s load-balancing function. We seek to offload our load-balancing capability on both on-path and off-path load balancers. Others have noted that the communication latencies between the SmartNIC cores and the host cores can be significant in the case of off-path SmartNICs [35], so we target complete offloads for both types of SmartNICs, i.e., all load balancing logic is performed on the SmartNIC cores. Further, this allows us to target even headless SmartNICs with an independent power supply and a carrier card, allowing for a host-less solution (e.g., Broadcom Stingray PS1100R [1]) and enabling substantial reductions to both hardware and operating costs. 2.2 Load balancers Load balancers operating at different network layers are widely deployed inside data centers to deliver traffic to services. They fall into two categories: Layer 4 and Layer 7. An L4 load balancer maps a virtual IP address (VIP) to a list of backend servers, with each server having its own dynamic IP address (DIP). As the L4 load balancers operate on the transport layer, the routing decision is solely based on the packet headers of the transport/IP layers (i.e., the 5-tuple of IP addresses and ports) but not the payload. Several L4 load balancers are deployed by cloud providers [14, 16, 43]). L7 load balancers are significantly more complex and operate on content at the application layer (e.g., HTTP data). Many services inside a data center may share a common application gateway implementing the L7 load-balancing functionality. The L7 load balancer dispatches requests to the corresponding backend servers based on the service requested, e.g., different services are commonly differentiated by the URL [23]. The load balancer would then reassemble the stream and match the URL against various patterns to route the request to the corresponding services. It is common for an L7 load balancer to modify the streamed application data, e.g., insert an x-forwarded-for header to inform the backend server of the real IP address of the client. The load balancer may also modify the reply from the server to inject a cookie into the response. Future requests from the same client can then be routed to the same backend server based on the cookie. Due to the complex nature and the functionality provided by the L7 load balancer, it is typically implemented as a dedicated application on top of the kernel networking stack, e.g., Nginx [15], Envoy [18], HAProxy [24]. Given the overheads of the OS’s networking stack and the application-level load balancing, the performance of L7 load balancers is an order of magnitude lower than that of L4 load balancers, with 50% to 90% of the processing time spent inside the kernel [25, 31]. This paper is available on arxiv under CC BY-NC-ND 4.0 DEED license. Authors: (1) Tianyi Cui, University of Washington (cuity@cs.washington.edu); (2) Chenxingyu Zhao, University of Washington (cxyzhao@cs.washington.edu); (3) Wei Zhang, Microsoft (wei.zhang.gbs@gmail.com); (4) Kaiyuan Zhang, University of Washington (kaiyuanz@cs.washington.edu). Authors: Authors: (1) Tianyi Cui, University of Washington (cuity@cs.washington.edu); (2) Chenxingyu Zhao, University of Washington (cxyzhao@cs.washington.edu); (3) Wei Zhang, Microsoft (wei.zhang.gbs@gmail.com); (4) Kaiyuan Zhang, University of Washington (kaiyuanz@cs.washington.edu). Editor's note: This is Part 2 of 6 of a study detailing attempts to optimize layer-7 load balancing. Read the rest below. Editor's note: This is Part 2 of 6 of a study detailing attempts to optimize layer-7 load balancing. Read the rest below. Editor's note: This is Part 2 of 6 of a study detailing attempts to optimize layer-7 load balancing. Read the rest below. Editor's note: This is Part 2 of 6 of a study detailing attempts to optimize layer-7 load balancing. Read the rest below. Table of Links Abstract and 1 Introduction 2 Background and 2.1 Programmable Multi-core SmartNICs

2.2 Load balancers 3 SmartNIC-based Load Balancers and 3.1 Offloading to SmartNICs: Challenges and Opportunities

3.2 Laconic Overview
3.3 Lightweight Network Stack
3.4 Lightweight synchronization for shared data
3.5 Acceleration with Hardware Engine 4 Evaluation and 4.1 Experiment Setup


4.2 End-to-end Throughput


4.3 End-to-end Latency


4.4 Evaluating the Benefits of Key Techniques


4.5 Real-world Workload 5 Related Work 6 Conclusion and References

A Appendix Abstract and 1 Introduction Abstract and 1 Introduction 2 Background and 2.1 Programmable Multi-core SmartNICs 2.2 Load balancers 2 Background and 2.1 Programmable Multi-core SmartNICs 2.2 Load balancers 2.2 Load balancers 3 SmartNIC-based Load Balancers and 3.1 Offloading to SmartNICs: Challenges and Opportunities 3.2 Laconic Overview
3.3 Lightweight Network Stack
3.4 Lightweight synchronization for shared data
3.5 Acceleration with Hardware Engine 3 SmartNIC-based Load Balancers and 3.1 Offloading to SmartNICs: Challenges and Opportunities 3.2 Laconic Overview 3.3 Lightweight Network Stack 3.4 Lightweight synchronization for shared data 3.5 Acceleration with Hardware Engine 3.2 Laconic Overview 3.3 Lightweight Network Stack 3.4 Lightweight synchronization for shared data 3.5 Acceleration with Hardware Engine 4 Evaluation and 4.1 Experiment Setup 4.2 End-to-end Throughput


4.3 End-to-end Latency


4.4 Evaluating the Benefits of Key Techniques


4.5 Real-world Workload 4 Evaluation and 4.1 Experiment Setup 4.2 End-to-end Throughput 4.3 End-to-end Latency 4.4 Evaluating the Benefits of Key Techniques 4.5 Real-world Workload 4.2 End-to-end Throughput 4.2 End-to-end Throughput 4.3 End-to-end Latency 4.3 End-to-end Latency 4.4 Evaluating the Benefits of Key Techniques 4.4 Evaluating the Benefits of Key Techniques 4.5 Real-world Workload 4.5 Real-world Workload 5 Related Work 5 Related Work 6 Conclusion and References A Appendix 6 Conclusion and References A Appendix A Appendix 2 Background This section discusses the structure, connectivity, and performance of programmable multi-core SmartNICs that are commonly available. We also describe the load-balancing functionality we want to deploy on these SmartNICs. 2.1 Programmable Multi-core SmartNICs We consider programmable SmartNICs equipped with multicore processors. A typical SmartNIC has onboard memory, DMA engines, and accelerators (e.g., engines for crypto, compression, and packet rewriting) in addition to the multi-core processor. Below, we discuss the two dominant categories, on-path and off-path SmartNICs [35]. On-Path SmartNICs: These are SmartNICs where the NIC processing cores are on the data path between the network port and the host processor (see Figure 1). Consequently, every packet received or transmitted by the host is also processed by the NIC cores. The performance of the NIC cores is critical to the throughput and latency characteristics of the NIC. To address this issue, these NICs typically augment the traditionally wimpy cores on the SmartNIC with specialized hardware support that enhances the packet-processing capabilities of the core. For example, packet contents are prefetched and placed in a structure similar to the L1 cache, and there are hardware mechanisms for managing packet buffers. The SmartNIC has hardware mechanisms for delivering incoming packets to NIC cores in a balanced manner, but there are no mechanisms, such as receive side scaling (RSS), to deliver specific packets to specific NIC cores. Further, the NIC cores can invoke specialized accelerators for tasks such as crypto and compression. Marvell LiquidIO [37] and Netronome NICs [40] are on-path SmartNICs. On-Path SmartNICs: Off-Path SmartNICs: These are SmartNICs where the NIC’s processing cores are off the data path connecting the host to the network. A NIC-level switching fabric, a NIC switch, provides connectivity between the network port, the host cores, and the NIC cores. The NIC switch is a specialized hardware unit with match-action engines for selecting packet fields and rewriting them based on runtime-configurable rules. The rules route packets received from the network to the host or the NIC, or rewrite them and immediately transmit them back into the network. Mellanox Bluefield [41] and Broadcom Stingray [10] are off-path SmartNICs. Off-Path SmartNICs: The off-path SmartNICs thus contain both general-purpose cores and packet match-action engines. The packet-processing logic could thus be split across the cores and the match-action engines based on the complexity of the logic. For instance, the cores can perform complex packet processing and delegate to the match-action engines simpler operations such as packet steering, header-rewriting, and packet forwarding. Offloading to SmartNICs: Datacenter operators are increasingly resorting to offloading various infrastructure functions to SmartNICs and reducing the usage of host cores, which can, in turn, then be rented out and monetized. The ARM cores on SmartNICs are not as powerful as the host x86 cores, but they are an order of magnitude less expensive and result in substantial cost savings [3, 6]. Network virtualization, security, and storage are some of the typical operations offloaded to SmartNICs, and in this work, we seek to expand this to include the infrastructure’s load-balancing function. Offloading to SmartNICs: We seek to offload our load-balancing capability on both on-path and off-path load balancers. Others have noted that the communication latencies between the SmartNIC cores and the host cores can be significant in the case of off-path SmartNICs [35], so we target complete offloads for both types of SmartNICs, i.e., all load balancing logic is performed on the SmartNIC cores. Further, this allows us to target even headless SmartNICs with an independent power supply and a carrier card, allowing for a host-less solution (e.g., Broadcom Stingray PS1100R [1]) and enabling substantial reductions to both hardware and operating costs. 2.2 Load balancers Load balancers operating at different network layers are widely deployed inside data centers to deliver traffic to services. They fall into two categories: Layer 4 and Layer 7. An L4 load balancer maps a virtual IP address (VIP) to a list of backend servers, with each server having its own dynamic IP address (DIP). As the L4 load balancers operate on the transport layer, the routing decision is solely based on the packet headers of the transport/IP layers (i.e., the 5-tuple of IP addresses and ports) but not the payload. Several L4 load balancers are deployed by cloud providers [14, 16, 43]). L7 load balancers are significantly more complex and operate on content at the application layer (e.g., HTTP data). Many services inside a data center may share a common application gateway implementing the L7 load-balancing functionality. The L7 load balancer dispatches requests to the corresponding backend servers based on the service requested, e.g., different services are commonly differentiated by the URL [23]. The load balancer would then reassemble the stream and match the URL against various patterns to route the request to the corresponding services. It is common for an L7 load balancer to modify the streamed application data, e.g., insert an x-forwarded-for header to inform the backend server of the real IP address of the client. The load balancer may also modify the reply from the server to inject a cookie into the response. Future requests from the same client can then be routed to the same backend server based on the cookie. Due to the complex nature and the functionality provided by the L7 load balancer, it is typically implemented as a dedicated application on top of the kernel networking stack, e.g., Nginx [15], Envoy [18], HAProxy [24]. Given the overheads of the OS’s networking stack and the application-level load balancing, the performance of L7 load balancers is an order of magnitude lower than that of L4 load balancers, with 50% to 90% of the processing time spent inside the kernel [25, 31]. This paper is available on arxiv under CC BY-NC-ND 4.0 DEED license. This paper is available on arxiv under CC BY-NC-ND 4.0 DEED license. available on arxiv

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